Synopsys' DesignWare IP for PCI Express with Support for Low-Power Sub-States Successfully Taped Out in Multiple Designs

News release:

Synopsys' DesignWare IP for PCI Express with Support for Low-Power Sub-States Successfully Taped Out in Multiple Designs

Industry-First Support for New PCIe L1 Sub-States Reduces Power Consumption

MOUNTAIN VIEW, Calif., July 9, 2012 /PRNewswire/ --
Highlights:

• Synopsys is the first IP provider to offer new "off" and "snooze"  power states (L1 sub-states) in PCI Express® controller IP
• Ten customer designs have integrated Synopsys' new PCI Express IP with L1 sub-states into camera, card reader, networking and wireless applications, with multiple product tapeouts
• L1 sub-state implementation can reduce PCI Express standby power consumption by approximately 99 percent

Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP used in the design, verification and manufacture of electronic components and systems, today announced that its industry-first PCI Express controller IP with support for low-power sub-states has successfully taped out in multiple designs. The addition of the L1.1 ("snooze") and L1.2 ("off") sub-states to Synopsys' DesignWare® controller IP for PCI Express 1.0, 2.0 and 3.0 enables designers to reduce power consumption in key market segments, including camera, card reader, networking and wireless applications serving the ultrabook and tablet markets. L1 sub-states reduce a PCI Express system's link idle power consumption from 15 to 20 milliwatts per lane to 10 microwatts per lane, or by approximately 99 percent, by repurposing the signals between the PHY and the controller so that they turn off the high-speed circuits in the PHY when not in use.
"Reducing power consumption in every aspect of an SoC is key for a mobile design's success," said Eric Esteve, market analyst at IPnest. "The availability of L1 sub-states in PCI Express controller IP will enable lower power consumption, which in turn improves battery life—a key differentiator in today's mobile designs."
Reducing standby power is a prerequisite for the emerging thin and light form factor mobile markets, and has now become critical in multiple market segments that must meet stringent regulatory power requirements such as European Regulation 1275/2008. To address these requirements, PCI-SIG members, including Synopsys, are proposing L1 sub-states to supplement previously adopted power saving features such as Latency Tolerance Reporting (LTR) and Optimized Buffer Flush/Fill (OBFF). Synopsys' first-to-market support for L1 sub-states has already enabled market leaders to integrate this new power-saving technology into ten designs while maintaining backward compatibility with existing PCI Express devices. With first silicon back on several of these designs, adopters are well on their way to delivering their low-power mobile products on or ahead of schedule.
"With the availability of L1 sub-states in our DesignWare controller IP for PCI Express, Synopsys leads the industry in adopting and rolling out the latest PCI-SIG enhancements," said John Koeter, vice president of marketing for IP and systems at Synopsys. "Our complete PCI Express controller IP portfolio helps reduce designers' integration risk and development time. With our first-to-market rollout of L1 sub-states, the portfolio continues to be on the forefront of power conservation for mobile and consumer device designers using PCI Express."
AvailabilitySynopsys® DesignWare controller IP for PCI Express with support for L1 sub-states is available now. For more information, please visit http://www.synopsys.com/pcie. The L1 sub-state engineering change request (ECR) is in the final stages of becoming an engineering change notification (ECN) to the PCI Express specification.

About DesignWare IP
Synopsys is a leading provider of high-quality, silicon-proven IP solutions for system-on-chip (SoC) designs. The broad DesignWare IP portfolio includes complete interface IP solutions consisting of controllers, PHY and verification IP for widely used protocols, analog IP, embedded memories, logic libraries, processor cores and subsystems. To support software development and hardware/software integration of the IP, Synopsys offers drivers, transaction-level models, and prototypes for many of its IP products. Synopsys' HAPS® FPGA-Based Prototyping Solution enables validation of the IP and the SoC in the system context. Synopsys' Virtualizer™ virtual prototyping tool set allows developers to start the development of software for the IP or the entire SoC significantly earlier compared to traditional methods. With a robust IP development methodology, extensive investment in quality, IP prototyping, software development and comprehensive technical support, Synopsys enables designers to accelerate time-to-market and reduce integration risk. For more information on DesignWare IP, visit http://www.synopsys.com/designware.

About SynopsysSynopsys, Inc. (Nasdaq:SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, system-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has approximately 70 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com.
PCI Express is a registered trademark of PCI-SIG.  

Princess Sumaya University for Technology Receives Charles Babbage Grant from Synopsys

News release:

Princess Sumaya University for Technology Receives Charles Babbage Grant from Synopsys

First in MENA Region to Establish New Full- and Semi-custom IC Design Laboratories

MOUNTAIN VIEW, Calif., May 30, 2012 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP used in the design, verification and manufacture of electronic components and systems, today announced that Princess Sumaya University for Technology (PSUT) in Amman, Jordan is the first university in the Middle East and North Africa (MENA) region to receive the Charles Babbage Grant from Synopsys. Through the grant, PSUT receives licenses for Synopsys' comprehensive, industry-leading electronic design automation (EDA) software, along with curriculum support and professor training. The grant also provides new computer hardware, printers and educational equipment, enabling PSUT to create two new laboratories for full- and semi-custom integrated circuit (IC) design for 20 students.
Lack of access to commercial-grade design tools for advanced research and microelectronic design is a common issue facing universities today. Synopsys helps solve this challenge through initiatives like the Charles Babbage Grant and its Worldwide University Program, which provide select universities with design software for modern electronic design flows and leading commercial IC fabrication processes. Previous grant recipients outside of United States include the Chinese Academy of Sciences, University of Southampton, Indian Institute of Technology Kharagpur, Moscow Institute of Electronic Technology (MIET), Yerevan State University and the State Engineering University of Armenia.
"PSUT is very grateful for this grant," said Professor Issa Batarseh, PSUT president. "It will provide our engineering students with access to world-leading software and tools and allow us to enhance our curricula."
"We always welcome industry collaboration and support," Dr. Wejdan Abu Elhaija, the Dean of King Abdullah II School for Electrical Engineering, added. "We're pleased to strengthen our relationship with Synopsys."
"Supporting programs that enable semiconductor design through academia continues to be an important priority for Synopsys," said Anwar Awad, vice president of engineering of the IP/Solutions group at Synopsys. "Working with PSUT, we have been able to create an educational program that will cultivate advanced IC design skills in Jordan and prepare graduates to establish local industry." Awad formally opened the lab in a ceremony attended by PSUT students and faculty on May 28.
Synopsys and the Department of Electronics Engineering at the King Abdullah II School of Electrical Engineering at PSUT began collaborating in 2010 by establishing a microelectronics education program through a VLSI course integrated into the Electronics Engineering curriculum in IC design. In addition to EDA software and computer resources, Synopsys provides PSUT with support, advisors, faculty training and facilitates student and faculty exchanges. In 2011, Jordanian students participated in internships and joined Student Working Groups at the Synopsys Armenia Educational Department and R&D center. The students also successfully competed in the International Microelectronics Olympiad of Armenia, an annual competition that recognizes and inspires young talented engineers involved in microelectronics. PSUT and Synopsys are continuing to strengthen their cooperation in research and education. Again this year, PSUT students will intern at Synopsys Armenia and participate in theSeventh International Microelectronics Olympiad of Armenia.
About the Charles Babbage GrantThe Charles Babbage Grant provides select universities worldwide with state-of-the-art EDA tools, training, support and technology. It enables institutions of higher education to enhance their expertise in microelectronics circuits and system design. Use of the Synopsys tools on modern, powerful computers from the grant helps universities to better prepare their graduates for the future by providing hands-on experience with current industry practices, modern design techniques and actual design tools and computer hardware. This enhances the students' understanding of how learning applies to the real world of IC design. The grant is named after British mathematician and inventor Charles Babbage, who designed and built mechanical computing machines on principles that anticipated the modern electronic computers of today over 150 years ago. For more information about the Synopsys Worldwide University Program, visit us at http://www.synopsys.com/Community/UniversityProgram/Pages/default.aspx.
About Princess Sumaya University for Technology (PSUT)Founded in 1991, Princess Sumaya University for Technology is a not-for-profit, top-ranked private university offering bachelors and masters degrees in business, IT and engineering. Its location within the El-Hassan Science City and the Royal Scientific Society has granted the university a special status within the scientific matrix of Al-Jubeiha, Amman, which includes the Ministry of Higher Education & Scientific Research, the Higher Council for Science and Technology and the Royal Geographic Center. For more information, please visit the PSUT website at http://www.psut.jo/main.
About Synopsys
Synopsys, Inc. (Nasdaq:SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, system-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has approximately 70 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.

Samsung Electronics Tapes out Gigahertz+ ARM Cortex-A15 Processor with Synopsys IC Compiler

Press Release:

Samsung Electronics Tapes out Gigahertz+ ARM Cortex-A15 Processor with Synopsys IC Compiler

Hardened core used in industry's first ARM® Cortex™-A15 processor-based SoC for mobile computing devices

MOUNTAIN VIEW, Calif., April 30, 2012 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP used in the design, verification and manufacture of electronic components and systems, today announced the successful collaboration between Synopsys and Samsung Electronics on the implementation of an ARM Cortex-A15 MPCore™ processor. The processor core was implemented by Samsung Austin Research Center (SARC) using Synopsys IC Compiler place-and-route technology, a cornerstone of the Synopsys Galaxy™ Implementation Platform. Running at operating speeds in excess of a gigahertz on Samsung's 32nm low power process, the hardened core has already been deployed in the industry's first Cortex-A15 processor-based SoC for mobile computing devices. The high speed was enabled through a unique combination of innovative optimization techniques and differentiated high-performance technologies which have made IC Compiler the tool of choice for high-performance designs across multiple process nodes.
"Our mission is to deliver the highest frequency while minimizing power for high-end processor and graphics cores targeted to the mobile computing and digital home markets," said Keith Hawkins, vice president, SARC. "Globally, this was the first production tapeout of a Cortex-A15 processor and we relied exclusively on IC Compiler and the Galaxy tool suite to predictably achieve our performance and power targets."
Samsung fabricated the three–million-instance, dual-core Cortex-A15 processor on a 32LP high-K metal gate (HKMG) process. Synopsys collaborated closely with SARC on an implementation methodology based on key high performance technologies and optimization techniques in the Galaxy Implementation Platform to meet Samsung's stringent mass production criteria for an on-time tapeout. The processor core relied on Physical Datapath in Design Compiler® Topographical and IC Compiler for the structured placement of registers to meet power and area objectives. Layout-based debug with Design Compiler Topographical allowed quick analysis of library, netlist and placement issues to close timing. Clock mesh in IC Compiler and PrimeTime® provided the low skew and increased on-chip-variation (OCV) tolerance necessary for the high-performance core.
"Samsung is a leading provider of silicon in the mobile computing market, as can be seen by its smart phone and tablet market penetration," said Antun Domic, senior vice president and general manager, Implementation Group at Synopsys. "Being at the forefront of next generation mobile products, Samsung has driven many of the technology innovations that have reinforced the position of IC Compiler as the leading choice for high-performance design. The benefits of our ongoing partnership can be seen in the impressive level of performance delivered by this gigahertz-plus processor core."
About Synopsys®
Synopsys, Inc. (Nasdaq: SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, system-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has approximately 70 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.

Social Media's New Innovators

Video from CNBC (5:54)

A look at the next generation of inventors that are changing the world of business, media and even society, with Joe Weisenthal, Business Insider deputy editor.

http://video.cnbc.com/gallery/?video=3000086224&play=1

Microsoft and Pegatron Corp. Sign Patent Agreement Covering Android- and Chrome-Based Devices

Microsoft and Pegatron Corp. Sign Patent Agreement Covering Android- and Chrome-Based Devices

April 25, 2012

The contents of the agreement have not been disclosed, the parties indicate that Microsoft will receive royalties from Pegatron under the agreement.

inShare3

REDMOND, Wash. — April 25, 2012 — Microsoft Corp. and Pegatron Corp. have signed a patent agreement that provides coverage under Microsoft’s patent portfolio for a broad array of Pegatron products including eReaders, smartphones and tablets running the Android or Chrome platforms. Although the contents of the agreement have not been disclosed, the parties indicate that Microsoft will receive royalties from Pegatron under the agreement.

“We are pleased to have reached this agreement with Pegatron and proud of the continued success of our Android licensing program in resolving IP issues surrounding Android and Chrome devices in the marketplace,” said Horacio Gutierrez, corporate vice president and deputy general counsel, Intellectual Property Group at Microsoft. “With this agreement, Microsoft has now licensed four of the top five Taiwanese ODMs.”

Microsoft’s Commitment to Licensing Intellectual Property

The patent agreement is another example of the important role intellectual property plays in ensuring a healthy and vibrant IT ecosystem. Since Microsoft launched its IP licensing program in December 2003, the company has entered into more than 1,100 licensing agreements and continues to develop programs that make it possible for customers, partners and competitors to access its IP portfolio. The program was developed to open access to Microsoft’s significant R&D investments and its growing, broad patent and IP portfolio.

More information about Microsoft’s licensing programs is available athttp://www.microsoft.com/iplicensing.

Founded in 1975, Microsoft (Nasdaq “MSFT”) is the worldwide leader in software, services and solutions that help people and businesses realize their full potential.

Note to editors: For more information, news and perspectives from Microsoft, please visit the Microsoft News Center at http://www.microsoft.com/news. Web links, telephone numbers and titles were correct at time of publication, but may have changed. For additional assistance, journalists and analysts may contact Microsoft’s Rapid Response Team or other appropriate contacts listed at http://www.microsoft.com/news/contactpr.mspx.