Search This Blog

Showing posts with label design. Show all posts
Showing posts with label design. Show all posts

Tuesday, July 24, 2012

Synopsys Mixed-Signal IC Design Solution Qualified for TowerJazz Power Management Reference Flow 2.0

News release:


Synopsys Mixed-Signal IC Design Solution Qualified for TowerJazz Power Management Reference Flow 2.0
Collaboration Delivers Comprehensive Power Management Solution
MOUNTAIN VIEW, Calif. and MIGDAL HAEMEK, Israel, July 24, 2012 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, and TowerJazz (NASDAQ: TSEM, TASE: TSEM), the global specialty foundry leader, today announced that they have qualified Synopsys' unified mixed-signal IC design solution for TowerJazz's power management analog/mixed-signal reference design flow (Reference Flow 2.0) and 180-nanometer (nm) Power Management (PM) interoperable process design kit (iPDK). Synopsys' tool suite, the foundry iPDK and reference design flow are verified to seamlessly work together to enable designers to quickly become productive.
Synopsys' unified mixed-signal IC design flow includes the IC Compiler™ and Galaxy Custom Designer® physical co-design implementation solution, HSPICE® circuit simulation, CustomSim™ FastSPICE simulation, CustomSim-VCS® mixed-signal co-simulation, IC Validator physical verification, and StarRC™ parasitic extraction tools. The TowerJazz PM Reference Flow 2.0includes a reference design based on a 180-nm iPDK for the bipolar CMOS DMOS (BCD) process. The TowerJazz BCD power management process platform offers the combination of 180-nm CMOS logic density with a wide range of high-voltage power devices on a single chip to enable the design of complex power management integrated circuits (ICs).
"TowerJazz and Synopsys have an on-going collaboration to create and promote iPDKs as a standard for the custom design community," said Ori Galzur, vice president of design center and design enablement at TowerJazz. "This collaboration has now been extended to our new TowerJazz Power Management Reference Flow 2.0 and further expands our relationship to include a qualified Synopsys mixed-signal design solution that addresses the needs of power management IC design."
"As ICs become more heterogeneous with a mix of cell-based and custom implementation, designers require a unified implementation and verification solution to stay productive and competitive," said Bijan Kiani, vice president of product marketing at Synopsys. "With this foundry-qualified solution, our mutual customers will be able to more easily manage the increased complexity and aggressive development schedules of mixed-signal designs."
About SynopsysSynopsys, Inc. (Nasdaq: SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, system-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has approximately 70 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at www.synopsys.com.
About TowerJazzTower  Semiconductor  Ltd. (NASDAQ: TSEM, TASE: TSEM), the global specialty foundry leader and  its fully owned U.S. subsidiary Jazz Semiconductor, operate collectively under the brand name TowerJazz, manufacturing integrated circuits with geometries ranging from  1.0  to  0.13-micron. TowerJazz provides industry leading design enablement tools to allow complex designs to be achieved quickly and more accurately and offers a broad range of customizable process technologies including SiGe, BiCMOS, mixed-signal and RFCMOS, CMOS image sensor, power management (BCD), and non-volatile memory (NVM), as well as MEMS capabilities. To provide world-class customer service, TowerJazz maintains two manufacturing facilities in Israel and one in the U.S. with additional capacity available in China through manufacturing partnerships. For more information, please visitwww.towerjazz.com.

Friday, July 13, 2012

IBM Collaborates with Russian Innovation Giants to Boost Microelectronics Industry

News release:


IBM Collaborates with Russian Innovation Giants to Boost Microelectronics Industry

Cloud computing technologies to form basis of new virtual design fab
Saint Petersburg - 13 Jul 2012: IBM (NYSE: IBM) and five leading Russian innovation companies: the Skolkovo Foundation, Rusnano, Rostelecom, Russian Venture Company and ITFY, have signed a collaboration agreement to help spur a new wave of innovation in Russian technology. 
The five Russian companies have joined forces to foster a culture of applied research and commercialization and attract key talent and investment from around the world in the area of microelectronics.  
Key to the initiative is the creation of a new Electronics Technology Center (ETC) to be housed at the Skolkovo Innovation City. The agreement will give the Electronics Technology Center access to IBM’s intellectual property for chip design. IBM will also provide cloud computing technologies to form the basis of a new virtual design environment to be used to develop new microelectronic devices such as sensors to be used in smarter infrastructure projects, industry and consumer electronics. 
“IBM is leading the way in collaborative innovation,” said Kirill Korniliev, General Manager, IBM Russia & CIS. “The ETC will use cloud technology to create a virtual working environment that brings together Russian innovation leaders where they can acquire, use and share design knowledge and spur a new wave of microelectronic innovation.” 
The cloud will help unite Russia’s dispersed microelectronics development teams and provide access to advanced technologies and best practice and foster global collaboration. Russian chip designers and fabless design houses will be able to access new semiconductor technologies, including automation tools, design kits, libraries and intellectual property. The center will also provide access to a wide variety of semiconductor production processes offered by many different foundries.           
The agreement was signed by Victor Vekselberg, President of the Skolkovo Foundation; Anatoly Chubais, CEO and Chairman of the Executive Board of Rosnano; Alexander Provotorov, President and Chairman of the Management Board of Rostelecom; Igor Agamirzian, CEO of Russian Venture Company; Evgeny Babayan, Chairman of the Board, ITFY; Leonid Svatkov, CEO ITFY; Bruno Di Leo, Senior Vice President IBM; and Kirill Korniliev, Country General Manager, IBM Russia & CIS.

"We are working with IBM to create an R&D ecosystem to kick start a new era in microelectronic devices design. Leveraging the latest cloud computing technologies, the Electronics Technology Center will provide customers with access to cutting-edge electronics technologies, design automation tools and specialist knowledge regardless of where they are geographically located," said Evgeny Babayan, Chairman of the Board, ITFY.

The ETC will initially focus on microelectronics design; however in the future it may be extended to other fields where cloud computing can support collaborative development projects.
IBM recently announced the opening of 10 new branch offices across Russia and the Commonwealth of Independent States (CIS) as part of a major initiative to capture regional business growth and increase its presence in the fastest growing markets in the world. 
The move is part of an incremental investment of $6 million that IBM will make in 2012 in the Russia and CIS region to expand its operations and increase its footprint to 22 offices. To strengthen its support for clients and partners, IBM will also double its staff in the Russian regions and strengthen its business partner network across the Russia/CIS region to over 4,000 partners this year. IBM currently has branches in the following cities: Moscow, St. Petersburg, Rostov-on-Don, Kazan, Yekaterinburg, Perm, Krasnoyarsk, Novosibirsk, Ufa, Khabarovsk, Tyumen, Chelyabinsk, Nizhniy Novgorod, Samara, Krasnodar, Kiev (Ukraine), Dnipropetrovsk (Ukraine), Kharkiv (Ukraine) and Donetsk (Ukraine), Almaty (Kazakhstan), Tashkent (Uzbekistan). 
ABOUT IBM
For more information on IBM, please visit: http://www-03.ibm.com/press/us/en/index.wss
For more information on IBM Growth Markets please visit: https://twitter.com/#IBMGrowthMkts 

Wednesday, May 30, 2012

GLOBALFOUNDRIES Selects Synopsys' Yield Explorer for Faster Yield Ramp

News release:


GLOBALFOUNDRIES Selects Synopsys' Yield Explorer for Faster Yield Ramp
Unique Fabless-Foundry Sharing Model Allows Automated Volume Diagnostics to Identify and Prioritize Systematic Failure Mechanisms

MOUNTAIN VIEW, Calif., May 30, 2012 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP used in the design, verification and manufacture of electronic components and systems, today announced that GLOBALFOUNDRIES has selected Synopsys' Yield Explorer® solution as part of their next-phase Yield Management System (YMS) for faster yield ramp based on volume diagnostics.  Rapid identification and correction of systematic failure mechanisms is critical to bringing a new technology node to production and driving the yield ramp on new integrated circuit (IC) designs. Yield Explorer Automated Volume Diagnostics allows GLOBALFOUNDRIES to quickly identify the dominant systematic failure mechanisms on early test chips as well as customers' chips, thereby reducing the time to achieve desirable yield levels. In addition, Yield Explorer's unique ability to combine and analyze data from design, fab and test domains enables collaboration between GLOBALFOUNDRIES and its customers to rapidly identify failure mechanisms and activate process or design corrective actions with high clarity and ease.
"Understanding and preventing the yield loss caused by design-process interactions is critical to ramp-up of designs manufactured on a new node," said Robert Madge, director of design enabled manufacturing at GLOBALFOUNDRIES. "Yield Explorer is a valuable new addition to our advanced Yield Management capabilities. Yield Explorer's unique data-sharing model very effectively addresses the sensitivity of design data, allowing strong collaboration with our customers during the yield ramp phase."
Yield Explorer delivers unparalleled flexibility and depth of capabilities in correlating yield loss to various design, fab and test attributes, as well as fast, robust automation for production analysis and reporting. Expert users benefit from the flexibility to perform analysis with an exploratory approach. Production teams rely on automated analysis routines to create various reports and provide a quick first view of yield issues on new production batches with minimal impact on cycle time. Additionally, any inputs to design teams for adjusting test plans or incremental layout changes are provided with specific and actionable details about the yield- limiting attribute of test or layout. The automated volume diagnostics in Yield Explorer are simple to deploy and work smoothly across a variety of design, fab and test outputs and data formats.
"Meeting yield targets for complex designs implemented on 28-nm and below technology requires understanding the complex interactions of design, lithography and process," said Howard Ko, senior vice president and general manager, Synopsys Silicon Engineering Group. "We are excited that GLOBALFOUNDRIES has chosen Yield Explorer to help them more quickly ramp-up new nodes and new designs."
About SynopsysSynopsys, Inc. (Nasdaq:SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, system-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has approximately 70 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.

Monday, May 14, 2012

AMD Selects Synopsys as a Verification IP Partner

News release:


AMD Selects Synopsys as a Verification IP Partner
Expands Collaboration to Further Accelerate SoC Verification
MOUNTAIN VIEW, Calif., May 14, 2012 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP used in the design, verification and manufacture of electronic components and systems, today announced a multi-year agreement to provide Advanced Micro Devices, Inc. (AMD) with its next-generation Discovery™ Verification IP (VIP). Based on the new VIPER architecture, the recently announced Discovery VIP family provides inherent performance, ease-of-use and extensibility to speed and simplify verification of the most complex system-on-chip (SoC) designs. This agreement covers a variety of VIP titles including USB 3.0, ARM® AMBA® AXI™ interconnect, SATA 3.0, PCI Express® Gen 3, and MIPI, as well as Synopsys' Protocol Analyzer, a unique protocol-aware SoC debug environment.
"In our verification environment for Southbridge SoCs and IP cores, we utilize several interfaces, including AXI3™ and USB 3.0. After an extensive evaluation, we selected Synopsys' next-generation Discovery VIP for several of our leading SoC designs," said Thomas Bodmer, manager of design engineering at AMD. "With Discovery VIP, we have seen benefits in minimizing our simulation runs and achieving higher coverage. We have used Synopsys' Protocol Analyzer technology to narrow down protocol violations and debug the root causes."
The growing use of increasingly complex interface protocols makes verification and debug of SoCs one of the most difficult and time-consuming aspects of functional verification. VIP provides functional models that engineers use to test all SoC interfaces before manufacturing, enabling them to verify whether an interface conforms to published specification. Synopsys' Discovery VIP family offers up to four times (4X) higher performance than other commercial VIP, as well as ease-of-use, ease-of-debug, configuration, coverage and test-development capabilities to improve SoC verification productivity.
"The strategic agreement announced today expands and accelerates the successful long-standing verification collaboration between AMD and Synopsys," said Manoj Gandhi, senior vice president and general manager of the Synopsys Verification Group. "With the increasingly critical nature of VIP in SoC verification, we continue to collaborate with AMD to deliver leading VIP technology that helps manage the total cost of verification."
About Synopsys®
Synopsys, Inc. (Nasdaq:SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, system-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has approximately 70 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.

Tuesday, May 8, 2012

EMC Delivers New Solution to Transform Processes for Designing, Building and Operating Complex Plants


EMC Press Release
EMC Delivers New Solution to Transform Processes for Designing, Building and Operating Complex Plants
Etihad Rail Implements EMC Documentum Engineering Plant and Facilities Management Solution to Accelerate Construction of UAE’s National Railway
HOPKINTON, Mass - May 8, 2012

News Summary:

  • EMC® Documentum® Engineering Plant and Facilities Management (EPFM) makes project execution less complicated with repeatable, industry-based solutions
  • Rapid deployment for faster and cheaper project delivery and rollout; lower cost of ownership
  • Customer Etihad Rail deploys Documentum EPFM for construction of major railway across United Arab Emirates (UAE)

Full Story:

EMC Corporation (NYSE: EMC) today announced the availability and initial customer success with theEMC® Documentum® Engineering Plant and Facilities Management (EPFM) solution. Documentum EPFM reduces the risk of project shutdown or downtime by providing secure, efficient access to "as built" engineering drawings and related content.
The Documentum EPFM solution was built in response to common challenges faced by energy plants, engineering and construction companies and facilities teams within large enterprises, namely misplacement and/or loss of critical project data, lack of collaboration and content sharing, and high risk due to non-compliance. Documentum EPFM focuses on highly project-centric and repeated processes for managing large numbers of documents and validating bulk imports of documents. It also supports collaboration across multiple parties (employees, clients, partners and regulators).

Customer Benefits:

  • Accelerate project execution by optimizing critical business processes with EMC Documentum
  • Reduce unplanned downtime by delivering the right content faster
  • Lower the risk of Environmental Health Standards (EHS) non-compliance by improving collaboration inside and outside the firewall
  • Optimize the plant maintenance process with enterprise content management (ECM) and maintenance systems integration
Built on top of the EMC Documentum platform, the EPFM solution includes easy-to-use configuration options to give users control over content; comprehensive information governance through role-based security, and simple document lifecycle and access control based on business document type.
Etihad Rail was formed to manage the development, construction and operation of the national railway for the United Arab Emirates (UAE), to link the principal centers of population and industry across the region. Whether it is providing safe, reliable journeys for residents, transporting sulphur for exportation, or moving steel and other raw materials, Etihad Rail and its network of clients aim to serve as a symbol of national pride. Looking to gain time-to-market advantage and a comprehensive solution that would enable the company to deliver projects on-time and in scope, Etihad Rail selected the Documentum EPFM solution to optimize key business processes, accelerate project execution and achieve regulatory compliance. The company is working with the EMC Information Intelligence Group Services team on the implementation.

Customer Quote:

Shadi Malak, Executive Director- Commercial, Etihad Rail
"We have ambitious plans and aggressive timelines to build a crucial national asset. We believe EPFM will play an important role in helping us meet our schedules and deliverables."

Executive Quote:

Rohit Ghai, Vice President, Products, EMC Information Intelligence Group.
"We're pleased to deliver Documentum EPFM to the market – a rapidly deployable solution to satisfy a common requirement for organizations of all sizes and industries. Etihad Rail will improve the way people and goods move across a wide-spread country, spurring new economic and social activities. Our customers deploy EMC Documentum solutions to literally transform the world around us; we're proud to be associated with such work, as it uniquely demonstrates the power of our solutions."

Additional Resources:

About Etihad Rail
Etihad Rail was established in June 2009 under Federal Law no. 2, with a mandate to manage the development, construction and operation of the UAE’s national freight and passenger railway network.
The railway network will be built in phases to link the principal centres of population and industry of the UAE, as well as to form a vital part of the planned Gulf Cooperation Council (GCC) railway network linking the six countries of the GCC.
Built to international standards, Etihad Rail’s state of the art network will act as a catalyst for economic growth and sustained social development. Once complete, the railway will redefine logistics and transport in the region, providing a modern, safe, efficient, sustainable network that will connect all regions of the UAE, and the UAE to its wider GCC neighbouring countries.
Etihad Rail has recently announced a number of contract awards for Stage One including:
  • The Civil & Track Works contract was awarded to a consortium comprising Italy’s Saipem, Tecnimont and UAE-based Dodsal Engineering and Construction
  • The Project Management Consultant (PMC) contract which was awarded to joint venture Parsons-Aecom
  • PCM Strescon Ventures was awarded the contract for the provision of railway sleepers. The Indian-based company will be responsible for the provision of railway sleepers in a purpose-built sleeper manufacturing facility at our rail head
  • Electro-Motive Diesel, from North America, was assigned to deliver seven locomotives custom-built for desert conditions by 2012
  • CSR Corporation Limited China was appointed to supply 240 covered hopper wagons for the movement of granulated sulphur in the Western Region
For more information, please visit the Etihad Rail website at:www.etihadrail.ae
About EMC
EMC Corporation is a global leader in enabling businesses and service providers to transform their operations and deliver IT as a service. Fundamental to this transformation is cloud computing.  Through innovative products and services, EMC accelerates the journey to cloud computing, helping IT departments to store, manage, protect and analyze their most valuable asset — information — in a more agile, trusted and cost-efficient way. Additional information about EMC can be found at www.EMC.com.

Synopsys Acquires RSoft Design Group

Press release:


Synopsys Acquires RSoft Design Group




MOUNTAIN VIEW, Calif., May 8, 2012 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP used in the design, verification and manufacture of electronic components and systems, today announced it has completed the acquisition of privately held RSoft Design Group, Inc. (RSoft), a leading provider of photonics design and simulation software headquartered in Ossining, New York. The combination of Synopsys' imaging and illumination design products with RSoft's photonics design products extends Synopsys' platform to provide a more complete set of optical solutions to current customers, as well as to support new technologies, applications and markets as they emerge. The acquisition is a natural extension of Synopsys' entry into the optics market that started in 2010 with the acquisition of Optical Research Associates (ORA®).  The terms of the deal have not been disclosed.
"Synopsys' strategy is two-fold: continued leadership in EDA while expanding our total addressable market into adjacent technologies, including optical design. The addition of RSoft's products expands Synopsys' solutions in both the optical and adjacent photonic markets," said Howard Ko, senior vice president and general manager of Synopsys' Silicon Engineering Group. "RSoft's products also complement our TCAD Sentaurus portfolio by providing a number of capabilities that allow us to extend our offering into other photonic areas such as optical waveguide modeling. This and many other capabilities will create strong synergies with Synopsys technology that will help us enable new opportunities with key customers."
RSoft's software is used to design and optimize optical telecommunications components, as well as in the design and simulation of complete optical telecommunication systems and networks. In semiconductor manufacturing, RSoft's software is used to design and optimize nanolithography components to enable faster and lower-power processors. RSoft's software can also be used to accurately model nano-scale optical structures that enhance the light extraction efficiency of applications such as LED structures, displays and solar cells, as well as enable increased optical data storage capacity.
About Synopsys®Synopsys, Inc. (Nasdaq:SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, system-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has approximately 70 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com.

Monday, April 30, 2012

Samsung Electronics Tapes out Gigahertz+ ARM Cortex-A15 Processor with Synopsys IC Compiler

Press Release:


Samsung Electronics Tapes out Gigahertz+ ARM Cortex-A15 Processor with Synopsys IC Compiler
Hardened core used in industry's first ARM® Cortex™-A15 processor-based SoC for mobile computing devices
MOUNTAIN VIEW, Calif., April 30, 2012 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP used in the design, verification and manufacture of electronic components and systems, today announced the successful collaboration between Synopsys and Samsung Electronics on the implementation of an ARM Cortex-A15 MPCore™ processor. The processor core was implemented by Samsung Austin Research Center (SARC) using Synopsys IC Compiler place-and-route technology, a cornerstone of the Synopsys Galaxy™ Implementation Platform. Running at operating speeds in excess of a gigahertz on Samsung's 32nm low power process, the hardened core has already been deployed in the industry's first Cortex-A15 processor-based SoC for mobile computing devices. The high speed was enabled through a unique combination of innovative optimization techniques and differentiated high-performance technologies which have made IC Compiler the tool of choice for high-performance designs across multiple process nodes.
"Our mission is to deliver the highest frequency while minimizing power for high-end processor and graphics cores targeted to the mobile computing and digital home markets," said Keith Hawkins, vice president, SARC. "Globally, this was the first production tapeout of a Cortex-A15 processor and we relied exclusively on IC Compiler and the Galaxy tool suite to predictably achieve our performance and power targets."
Samsung fabricated the three–million-instance, dual-core Cortex-A15 processor on a 32LP high-K metal gate (HKMG) process. Synopsys collaborated closely with SARC on an implementation methodology based on key high performance technologies and optimization techniques in the Galaxy Implementation Platform to meet Samsung's stringent mass production criteria for an on-time tapeout. The processor core relied on Physical Datapath in Design Compiler® Topographical and IC Compiler for the structured placement of registers to meet power and area objectives. Layout-based debug with Design Compiler Topographical allowed quick analysis of library, netlist and placement issues to close timing. Clock mesh in IC Compiler and PrimeTime® provided the low skew and increased on-chip-variation (OCV) tolerance necessary for the high-performance core.
"Samsung is a leading provider of silicon in the mobile computing market, as can be seen by its smart phone and tablet market penetration," said Antun Domic, senior vice president and general manager, Implementation Group at Synopsys. "Being at the forefront of next generation mobile products, Samsung has driven many of the technology innovations that have reinforced the position of IC Compiler as the leading choice for high-performance design. The benefits of our ongoing partnership can be seen in the impressive level of performance delivered by this gigahertz-plus processor core."
About Synopsys®
Synopsys, Inc. (Nasdaq: SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, system-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has approximately 70 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.